Multi channel analog digital acquisition and proce

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Abstract: a design scheme of multi-channel analog and digital acquisition and processing system based on FPGA technology is proposed, the structure of the whole system is analyzed, and the division of hardware resources and software design scheme in FPGA are discussed. The external circuit structure of this design scheme is simple and reliable, which is especially suitable for multi-channel detection system, and can easily expand the system according to needs. It has certain universality for the detection system

key words: fpgaa/D acquisition digital quantity acquisition VHDL language design

in the electrical measurement and control system, it is often necessary to collect various analog and digital signals and process them accordingly. In general, common MCU (such as 51, 196 single chip microcomputer or control DSP) can be used to complete the system task in the measurement and control system. However, when there are many semaphores to be collected in the system (especially various semaphores and state quantities), it is often difficult to complete the task only by using the resources of ordinary MCU. At this time, we can only adopt multi MCU online processing mode, or rely on other chips to expand system resources to complete the monitoring task of the system. This not only increases the cost of a large number of external circuits and systems, but also greatly increases the complexity of the system. Therefore, the reliability of the system will be affected to a certain extent, which is obviously not what the designer wants to see. This paper presents an analog and digital acquisition and processing system based on FPGA technology, which makes use of the characteristics of FPGA with many I/O ports and can freely program, control and define its functions. Combined with the FPGA internal execution software written in VHDL, it can well solve the problem of large number of signal channels collected. Because the execution software written in VHDL processes each group of digital quantity in parallel, and the speed of FPGA hardware is ns level, which is difficult for any MCU to achieve at present, this system can monitor the change of signal quantity in real time and quickly than other systems. Therefore, in the monitoring system with a large amount of state, this system will be able to exert its own advantages

the peripheral circuit design of the system is relatively simple and reliable. In view of the characteristics of FPGA and VHDL, the system has good expansibility and certain universality in the monitoring and control system. The system mainly includes: FPGA chip area, multi-channel selection and a/D sampling circuit, AC signal conditioning circuit, optocoupler isolation driving circuit, clock power supply area, prom code download circuit and so on. The structure is shown in Figure 1

Figure 1 block diagram of multi-channel analog and digital acquisition and processing system based on FPGA technology

1 FPGA chip characteristic analysis and resource allocation

a more important problem in this system is the large addition of toughening agent. Use spantan-ii system xc2spq208 of Xilinx company. The core of this series adopts 2.5V power supply, and the working frequency can reach 200MHz at most; The power supply voltage of I/O port is 3.3V, which can withstand 5V input high level

Spartan II series has rich I/O port resources. The I/O port output buffer is ready to receive up to 24Ma pull current and 48mA fill current. By default, the driving capacity of I/O output port is 12mA, which can also be set to 2, 4, 6, 8, 16 or 24Ma

the internal resources of FPGA are divided into four parts, as shown in Figure 2

① FPGA logic operation center. It is used to receive the data of other parts, and analyze and process the received data according to the scheme set in the program. Including: for B) 1 and other products (b) received from MCU; Analyze the data instructions and carry out corresponding operations according to their instructions; Receive the data from a/D sampling and process the data, such as finding its effective value, FFT analysis, etc; Receive various information data from digital quantity, judge and process them according to the set mode, and be responsible for outputting corresponding digital quantity according to the received CPU instruction

② A/D control unit. It is mainly responsible for controlling the gating sequence of external a/D chip and multiplexer, and realizing the reasonable control of a/D acquisition process. Because, inside the FPGA chip, there are not as many peripheral control resources for users as inside the MCU. To use FPGA to control the action of a/D sampling process, software must be used to simulate and realize various A/D control resources. Using these self-set A/D control management resources and reasonable software control timing can ensure the smooth progress of the sampling process

③ digital quantity monitoring control unit. Be responsible for the collection of status data of all digital quantities to be monitored and controlled and the output of control commands. This part also needs software to simulate and realize the management and control of various digital quantities. Only equipped with relatively complete peripheral control and management unit, the management and control of the whole digital quantity. What are the uses and functional characteristics of anchor fatigue testing machine? 1. Let's look at the introduction below in order to be correct and reasonable

④ FPGA interface logic control unit. The interface unit between FPGA module and external MCU is designed in FPGA, which takes up some internal resources, but considering that the general engineering system not only includes the acquisition and control of various information, but also often includes communication, display and some complex arithmetic operation. Although FPGA has its significant advantages, it is often not as easy to implement as ordinary MCU in these aspects. Therefore, considering the universality of this system, the interface unit between FPGA module and external MCU is added in the design

Figure 2 Schematic diagram of internal resource allocation of FPGA

2 control and management of AC analog acquisition

in the peripheral circuit of AC analog acquisition, the A/D chip adopts ADS774 of BB company. The multi-channel AC quantity is input to ADS774 chip through the multi-channel switch of 4051. Before entering ADS774, the AC signal shall pass through the signal modulation circuit and be conditioned into an analog signal recognized by ADS774

the AC sampling processing control software realized by FPGA consists of five parts:

the first part is the set three 16 bit instruction register groups related to a/D sampling: A/D parameter register (ADPR) and output control register


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